The semiconductor industry is increasingly being driven to decrease the size of semiconductor devices located on integrated circuits. For example, miniaturization is needed to accommodate the increasing density of circuits necessary for today's semiconductor products. Increased packing density and device size reduction has forced semiconductor device structures such as, for instance, transistors to be located ever closer to one another.
Unfortunately, conventional techniques of reducing component size will soon be reaching their limits. For example, conventional photolithography suffers from the diffraction limit and, consequently, cannot define patterns generally smaller than 100 nm. Advancements in lithographic methods such as e-beam lithography have been able create features as small as 10 nm. However, e-beam lithography is a sequential process and suffers from low throughput. Thus, e-beam lithography is not well suited for commercial applications which necessarily require high throughput.
As the trend toward miniaturization continues, the size of features in semiconductor-based devices will be on the nanometer scale. Features may be formed from molecules or even single atoms. The problem is that the precise location of molecules or atoms on a substrate is difficult to control. Control of the precise location of features on a substrate has been essential, however, in CMOS-based processes. Conventional CMOS-based process require precise registration of features over an entire substrate. Such substrates can be particularly large, for example, having diameters as large as 12 inches. Any new process for forming semiconductor-based features needs to preserve this precision on the wafer scale in order to make the process commercially feasible.
The barrier to nanometer scale lithography has given rise to attempts to use self-assembled molecules as a potential means to form nano-scale structures on a substrate. These techniques generally involve block copolymer or protein crystals with unit cell dimensions being on the order of nanometers. A subsequent step, which may take the form of an etching step, is used to transfer the formed pattern onto the substrate or overlying layer as in conventional photolithographic processes. One challenge, intrinsic to all self-assembly processes, is the poly-crystalline nature of the resulting film. Because of the simultaneous or near-simultaneous nucleation of many ordered domains, also known as crystallites over the entire surface of the substrate, the poly-crystalline morphology cannot be avoided. The maximum grain size is on the order of 1 μm. Consequently, there is no long-range order in the resulting crystalline films as is generally required for CMOS-based technology.
Various attempts have been undertaken to increase the long-range order of self-assembled nano-structured surfaces. In one method, for example, the substrate on which the film is formed contains regular patterning. Patterning is carried out by topographically or chemically modulating a substrate using interference lithography. The periodically-modulated substrate then provides for long-range order to the self-organized system. In another method, graphoepitaxy is used to induce orientation and positional ordering of block copolymer through artificial surface patterning such as the grooves of a diffraction grating. See e.g., C. A. Ross et al., Nanostructured Surfaces with Long-Range Order for Controlled Self-Assembly, NSF Nanoscale Science and Eng. Grantees Conf., Dec. 16–18, 2003. In the latter process, well-ordered structures can reportedly be formed within the grooves of the grating.
Still others have attempted to use rapid solidification to orient block copolymer micro-domains. U.S. Patent Publication No. 2003/0118800 discloses such a process that uses rapid solidification from a solvent to form patterns of micro-domains in thin films of block copolymer.
There remains a need for a method of controlling the nucleation of self-assembled thin films. Preferably, the method can be used to create long-range order over the entire surface of a substrate and not just in one or more micro-domains on the substrate. The method would advantageously have high throughput such that the method could be employed in commercial applications to create nano-scale structures.